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October 8, 2010 - MULTIPROG 2011 (Fourth Workshop on Programmability Issues for Heterogeneous Multicores)

Fourth Workshop on Programmability Issues for Heterogeneous Multicores (MULTIPROG-2011) Held in conjunction with the 6th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC) Heraklion, Crete, Greece, January 23, 2011
When Oct 08, 2010 12:00 AM to
Jan 23, 2011 12:00 AM
Where Heraklion, Crete, Greece
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CALL FOR PAPERS Fourth Workshop on Programmability Issues for Heterogeneous Multicores (MULTIPROG-2011) Held in conjunction with the 6th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC) Heraklion, Crete, Greece, January 23, 2011 Workshop website: http://multiprog.ac.upc.edu/ Goal of the Workshop -------------------- Computer manufacturers have already embarked on the multi-core roadmap, promising to add more and more cores/hardware threads on a chip: many-cores are on the horizon. This shift to an increasing number of cores and heterogeneous architectures has placed new burdens on the programming community. Until now, software has been developed with a single processor in mind and it needs to be parallelized and optimized for accelerators such as GPUs to take advantage of the new breed of multi-/many-core computers. As a result, progress in how to easily harness the computing power of multi-core architectures is in great demand. The fourth edition of the MULTIPROG workshop aims to bring together, and cause fruitful interaction between, researchers interested in programming models and their implementation and in computer architecture, with special emphasis on heterogeneous architectures. A wide spectrum of issues are central themes for this workshop such as what the future programming models should look like to accelerate software productivity, how compilers, run-times and architectures should support these new programming models, innovative algorithm and data structure development, and heterogeneous embedded, accelerated systems. MULTIPROG is intended for quick publication of early results, work-in-progress, etc, and is not intended to prevent later publication of extended papers. We will prioritize papers addressing cross-cutting issues and that provide thought-provoking insights into the main themes. Proceedings with accepted papers will be made available at the workshop. This year, for the first time, two AMD Best Paper Awards will be presented to the two most outstanding papers presented at MULTIPROG'11. Each winner will receive a high-end ATi graphics card sponsored by AMD. Topics of interest ------------------ Papers are sought on topics including, but not limited to: * Multi-core architectures o Architectural support for compilers/programming models o Processor (core) architecture and accelerators, in particular GPUs o Memory system architecture o Performance, power, temperature, and reliability issues * Heterogeneous computing o Algorithms and data structures for heterogeneous systems o Applications for heterogeneous computing and real-time graphics * Programming models for multi-core architectures o Language extensions o Run-time systems o Compiler optimizations and techniques * Benchmarking of multi-/many-core architectures o Tools for discovering and understanding parallelism o Tools for understanding performance and debugging o Case studies and performance evaluation Organizers ---------- Eduard Ayguade UPC and Barcelona Supercomputing Center Spain (eduard[at]ac.upc.edu) Benedict R. Gaster Advanced Micro Devices (AMD) USA (benedict.gaster[at]amd.com) Roberto Gioiosa IBM Research - Watson USA (rgioios[at]us.ibm.com) Lee Howes Advanced Micro Devices (AMD) USA (lee.howes[at]amd.com) Per Stenstrom Chalmers University of Technology Sweden (pers[at]chalmers.se) Osman Unsal BSC-Microsoft Research Centre Spain (osman.unsal[at]bsc.es) Important dates --------------- Abstract Submission: October 3, 2010 Submission deadline: October 8, 2010 Notification to authors: November 28, 2010 Final version of accepted papers: TBA Paper submission ---------------- Submitted papers should use the LNCS format and should be 12 pages maximum. Manuscript preparation guidelines can be found at the LNCS web site. Please check that (i) pages are numbered, and (ii) graphs etc. remain legible when printed in black and white. Additional information about paper submission will be available through the workshop website. Program commitee ---------------- Ben Bergen, LANL, USA Manuel Chakravarty, U. of New South Wales, Australia Mats Brorsson, KTH, Sweden Pascal Felber, U. of Neuchatel, Switzerland Guang Gao, U. of Delawere, USA Roberto Giorgi, U. of Siena, Italy Hakan Grahn, Blekinge Institute of Technology, Sweden Tim Harris, Microsoft Research Cambridge, UK Wen-mei Hwu, U. of Illinois, Urbana-Champaign, USA Mike Houston, AMD, USA Paul Kelly, Imperial College of London, UK Mikel Lujan, U. of Manchester, UK Tim Mattson, Intel Research, USA Simon McKintosh-Smith, U. of Bristol, UK Avi Mendelson, Microsoft, Israel Nacho Navarro, UPC/BSC, Spain Dimitris Nikolopoulos, FORTH-ICS, Greece Andy Pimentel, U. of Amsterdam, The Netherlands Oscar Plata, U. of Malaga, Spain Yanos Sazeides, U. of Cyprus, Cyprus Andre Seznec, INRIA/IRISA, France Nir Shavit, Tel Aviv U., Israel John E. Stone, U. of Illinois, USA

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